This patent application relates to the field of circuit simulation, and more precisely to more easily managing component models, model parameters, and further components added using subcircuits.
Designers of electronic circuits frequently use various techniques to test and modify their designs. Such designers may for example use computer software to create a circuit design with electronic component representations. The initial design may be simulated with the software, to ensure proper functionality. A variety of commercially offered software programs are available for circuit simulation, including those based on SPICE-type simulator interfaces and/or algorithms.
Circuit designers attempt to meticulously model the various circuit components to ensure the simulation results match actual manufactured component behaviors. Component representations in a design may be entirely user-defined, but more often are instances of components or devices previously installed into the simulation program, often by software vendors. Such built-in or “primitive” component instances may include transistors, resistors, capacitors, and various other circuit elements as may be known in the art. The component instances may be tailored to behave in precise ways, often by the specification of a number of parameters.
Circuit designers may also use a hierarchical design structure to more efficiently create a circuit. This concept permits a single component or a group of components to be represented as a subcircuit, for example. Use of hierarchical structures further presents a more abstract view at any hierarchical design level, allowing the designer to concentrate on the simulation program interface at that level without worrying about lower level details.
Management of the component instance parameters used in hierarchical designs is not always straightforward, however. Subcircuits may be nested, and may contain not only component instances with specified parameters, but also model statements that may specify parameters for built-in models. Further, some commonly used built-in components may have a large number of possible parameters (e.g., forty or more), and the behavior of each component instance may depend strongly on whether a parameter value was actually specified or was left unspecified. In other words, omission of a parameter may have more impact than merely having that one parameter take on a predetermined default parameter value.
Component instances may have complex interdependent parameter interactions, with some default parameter values being calculated from other parameters for example. Further, different simulation programs may process circuit designs somewhat differently. As a result, modeling engineers must spend significant time and effort to ensure proper and consistent component simulation behavior.
For example, it is a common practice for modeling engineers to extend device models using a subcircuit “wrapper”. Such a subcircuit may include an instance of a built-in device (e.g., a MOSFET) as well as additional parasitic resistances and capacitances or other circuit elements selected to more precisely model an actual manufactured device. Instead of using an instance of a built-in device directly in a circuit design, a designer may decide to use a subcircuit containing such an “extended” device. Many integrated circuit foundries provide such subcircuit wrappers for devices made via their particular processes.
This practice presents some difficulties in current simulator programs. First, commonly used built-in devices may have many parameters that determine their behavior, and at present these parameters must all be explicitly declared as subcircuit parameters when using a subcircuit wrapper. Second, when the built-in device is instantiated in the subcircuit, its parameters will be set on the device instance line. However, there is currently no capability in subcircuits to only set a parameter if the user has explicitly specified its value on the subcircuit instance line itself. The behavior of the built-in device model may change, as previously described, depending upon whether a parameter is actually specified or is left unspecified.
Accordingly, the inventors have developed a novel way to extend device model parameter specification flexibility when using a subcircuit wrapper.